1. Field of the Invention
The present invention is in the field of microwave field effect transistors, and more specifically, is in the field of a new Silicon power LDMOS structure optimized for operation above 3 GHz, for use in wireless communication applications.
2. Discussion of the Prior Art
The prior art power MOS devices have been widely used lately in wireless communication RF amplifiers for their better linearity, thermal stability and ruggedness as compared to bipolar devices. As the applications for wireless communications move up in the frequency spectrum, parasitic resistances, capacitances and inductances limit thc performance of present available structures. More specifically, in the available prior art LDMOS structures that are designed for the highest operational bands of wireless communications the effect of parasitic drain-to-source (Cds) and drain-to-gate (Cdg) capacitances is too big and has to be reduced to achieve the best performance.
Thus, what is needed is a novel MOS structure capable of further reduction of the Cdg and Cds capacitances in devices designed for the highest operational bands of wireless communications.